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Anand Desai ツ posted a job: Looking for system level test engineer , 2-10 YOE. Bangalore & Noida location "• Strong verilog skills, experience with VHDL a plus • Strong experience with simulation and verification tools • Experience with emulation, Cadence’s Palladium product preferred • Strong knowledge of general design debug techniques, specific knowledge of FPGA design debug a plus • Strong English communication skills, both written and verbal • Strong scripting and Unix skills required • Excellent multi-tasking skills required • Experience with Altera FPGAs a plus. • Experience with hardware debug tools like logic analyzer and oscilloscope a plus." | |||||
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Thursday, May 9, 2013
New job Looking for system level test engineer , 2-10 YOE. Bangalore & Noida location
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